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1 lt1777 low noise step-down switching regulator n programmable di/dt limit n internally limited dv/dt n high input voltage: 48v max n 700ma peak switch rating n true current mode control n 100khz fixed operating frequency n synchronizable to 250khz n low supply current in shutdown: 30 m a n low thermal resistance 16-pin so package the lt ? 1777 is a buck (step-down) regulator designed for noise sensitive applications. it contains a di/dt limiting circuit programmed via a small external inductor in the switching path. internal circuitry also generates controlled dv/dt ramp rates. the monolithic die includes all oscillator, control and protection circuitry. the part can accept operating input voltages as high as 48v, and contains an output switch rated at 700ma peak current. current mode control offers excellent dynamic input supply rejection and short-circuit protection. the internal control circuitry is normally pow- ered via the v cc pin, thereby minimizing power drawn directly from the v in supply (see applications informa- tion). the fused-lead so16 package and 100khz switch- ing frequency allow for minimal pc board area requirements. v sw voltage 10v/div 500ns/div 1777 ta02 v sw switching waveforms low noise 5v step-down supply n automotive cellular and gps receivers n telecom power supplies n industrial instrument power supplies v sw current 200ma/div + v in v cc v sw lt1777 v d shdn sync 4 10 7 6 1 h* 220 h 100 f 10v 36.5k 1% 1777 ta01 v out 5v 400ma 12.1k 1% 5 3 v in 24v 12 14 13 v c mbrs1100 fb sgnd + 39 f 63v 12k 2200pf 100pf *programs di/dt 100pf , ltc and lt are registered trademarks of linear technology corporation. features descriptio u applicatio s u typical applicatio u
2 lt1777 absolute m axi m u m ratings w ww u wu u package / o rder i for atio (note 1) supply voltage ....................................................... 48v switch voltage (v in C v sw ) (note 4) ...................... 51v shdn, sync pin voltage .......................................... 7v v cc pin voltage ...................................................... 30v fb pin voltage ........................................................ 3.0v operating junction temperature range lt1777c ............................................... 0 c to 125 c lt1777i ........................................... C 40 c to 125 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c top view s package 16-lead plastic so 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 gnd* nc shdn v cc v d v sw sgnd gnd* gnd* nc v c fb sync nc v in gnd* t jmax = 125 c, q ja = 50 c/w* consult factory for military grade parts. electrical characteristics the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t j = 25 c. v in = 24v, v sw open, v cc = 5v, v c = 1.4v unless otherwise noted. order part number symbol parameter conditions min typ max units power supplies v in(min) minimum input voltage 6.7 7.0 v l 7.4 v i vin v in supply current v c = 0v 620 800 m a l 900 m a i vcc v cc supply current v c = 0v 2.5 3.5 ma l 4.5 ma v vcc v cc dropout voltage (note 2) l 2.8 3.1 v shutdown mode i vin v shdn = 0v 30 50 m a l 75 m a feedback amplifier v ref reference voltage 1.225 1.240 1.255 v l 1.215 1.265 v i in fb pin input bias current 600 1500 na g m feedback amplifier transconductance d i c = 10 m a 400 650 1000 m mho l 200 1500 m mho i src , i snk feedback amplifier source or sink current 60 100 170 m a l 45 220 m a v cl feedback amplifier clamp voltage 2.0 v reference voltage line regulation 12v v in 48v l 0.01 %/v voltage gain 200 600 v/v *four corner pins are fused to internal die attach paddle for heat sinking. connect these four pins to expanded pc lands for proper heat sinking. lt1777cs lt1777is
3 lt1777 electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: control circuitry powered from v cc . note 3: switch current limit is dc trimmed and tested in production. inductor di/dt rate will cause a somewhat higher current limit in actual application. note 4: during normal operation the v sw pin may fly as much as 3v below ground. however, the lt1777 may not be used in an inverting dc/dc configuration. symbol parameter conditions min typ max units output switch r on output switch on voltage i sw = 0.5a 1.0 1.5 v i lim switch current limit (note 3) l 0.55 0.70 1.0 a output dl/dt sense voltage 1.3 v l 0.6 2.0 v current amplifier control pin threshold duty cycle = 0% 0.9 1.1 1.25 v control voltage to switch transconductance 2 a/v timing f switching frequency 90 100 110 khz l 85 115 khz maximum switch duty cycle l 85 90 % sync function minimum sync amplitude l 1.5 2.2 v synchronization range l 130 250 khz sync pin input r 40 k w shdn pin function v shdn shutdown mode threshold 0.5 v l 0.2 0.8 v upper lockout threshold switching action on 1.260 v lower lockout threshold switching action off 1.245 v i shdn shutdown pin current v shdn = 0v 12 20 m a v shdn = 1.25v 2.5 10 m a the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t j = 25 c. v in = 24v, v sw open, v cc = 5v, v c = 1.4v unless otherwise noted.
4 lt1777 typical perfor a ce characteristics uw minimum input voltage vs temperature temperature ( c) ?0 7.4 7.2 7.0 6.8 6.6 6.4 6.2 6.0 25 75 1777 g01 ?5 0 50 100 125 input voltage (v) switch current (ma) 0 switch voltage (v) 1.50 1.25 1.00 0.75 0.50 0.25 0 300 500 1777 g02 100 200 400 600 700 125 c ?5 c 25 c switch on voltage vs switch current switch current limit vs duty cycle duty cycle (%) 0 switch current limit (ma) 1000 800 600 400 200 0 80 1777 g03 20 10 30 50 70 90 40 60 100 t a = 25 c shdn pin shutdown threshold vs temperature temperature ( c) ?0 900 800 700 600 500 400 300 200 25 75 1777 g04 ?5 0 50 100 125 shdn pin voltage (mv) shdn pin current vs voltage shdn pin lockout thresholds vs temperature shdn pin voltage (v) 0 shdn pin input current ( a) 5 0 ? ?0 ?5 ?0 4 1777 g05 1 2 3 5 25 c 125 c ?5 c temperature ( c) ?0 1.30 1.28 1.26 1.24 1.22 1.20 25 75 1777 g06 ?5 0 50 100 125 shdn pin voltage (v) upper threshold lower threshold
5 lt1777 typical perfor a ce characteristics uw switching frequency vs temperature minimum synchronization voltage vs temperature output di/dt sense voltage vs temperature v c pin switching threshold, clamp voltage vs temperature feedback amplifier output current vs fb pin voltage error amplifier transconductance vs temperature temperature ( c) switching frequency (khz) 106 104 102 100 98 96 94 1777 g07 ?0 25 75 ?5 0 50 100 125 temperature ( c) minimum synchronization voltage (v) 2.25 2.00 1.75 1.50 1.25 1.00 0.75 1777 g08 ?0 25 75 ?5 0 50 100 125 temperature ( c) di/dt sense voltage (v) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 1777 g09 ?0 25 75 ?5 0 50 100 125 temperature ( c) ?0 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 25 75 1777 g10 ?5 0 50 100 125 v c pin voltage (v) clamp voltage switching threshold fb pin voltage (v) 1.0 feedback amplifier output current ( a) 100 50 0 ?0 100 150 1.4 1777 g11 1.1 1.2 1.3 1.5 25 c 125 c ?5 c temperature ( c) ?0 750 700 650 600 550 500 450 400 25 75 1777 g12 ?5 0 50 100 125 transconductance ( mho)
6 lt1777 pi n fu n ctio n s uuu removed or supplied accordingly to limit di/dt (see appli- cations information). v sw (pin 6): this is the emitter node of the output switch and has large currents flowing through it. keep the traces to the switching components as short as possible to minimize electromagnetic radiation and voltage spikes. sgnd (pin 7): this is the device signal ground pin. the internal reference and feedback amplifier are referred to it. keep the ground path connection to the fb divider and the v c compensation capacitor free of large ground currents. v in (pin 10): this is the high voltage supply pin for the output switch. it also supplies power to the internal control circuitry during start-up conditions or if the v cc pin is left open. a high quality bypass capacitor which meets the input ripple current requirements is needed here (see applications information). sync (pin 12): pin to synchronize internal oscillator to external frequency reference. it is directly logic compat- ible and can be driven with any signal between 10% and 90% duty cycle. the sync function is internally disabled if the fb pin voltage is low enough to cause oscillator slowdown. if unused, this pin should be grounded. fb (pin 13): this is the inverting input to the feedback amplifier. the noninverting input of this amplifier is inter- nally tied to the 1.24v reference. this pin also slows down the frequency of the internal oscillator when its voltage is abnormally low, e.g. 2/3 of normal or less. this feature helps maintain proper short-circuit protection. coupling from high speed noise to this pin can cause irregular operation. (see switch node considerations section.) v c (pin 14): this is the control voltage pin which is the output of the feedback amplifier and the input of the current comparator. frequency compensation of the over- all loop is effected by placing a capacitor (or in most cases a series r/c combination) between this node and ground. coupling from high speed noise to this pin can cause irregular operation. (see switch node considerations section.) gnd (pins 1, 8, 9, 16): these corner package pins are mechanically connected to the die paddle and thus aid in conducting away internally generated heat. as these are electrically connected to the die substrate, they must be held at ground potential. a direct connection to the local ground plane is recommended. nc (pins 2, 11, 15): package pins 2, 11 and 15 are unconnected. shdn (pin 3): when pulled below the shutdown mode threshold, nominally 0.5v, this pin turns off the regulator and reduces v in input current to a few tens of microam- peres (shutdown mode). when this pin is held above the shutdown mode threshold, but below the lockout threshold, the part will be opera- tional with the exception that output switching action will be inhibited (lockout mode). a user-adjustable undervolt- age lockout can be implemented by driving this pin from an external resistor divider to v in . this action is logically anded with the internal uvlo, nominally set at 6.7v, such that minimum v in can be increased above 6.7v, but not decreased (see applications information). if unused, this pin should be left open. however, the high impedance nature of this pin renders it susceptible to coupling from the v sw node, so a small capacitor to ground, typically 100pf or so is recommended when the pin is left open. v cc : (pin 4): pin to power the internal control circuitry from the switching supply output. proper use of this pin enhances overall power supply efficiency. during start-up conditions, internal control circuitry is powered directly from v in . if the output capacitor is located more than an inch from the v cc pin, a separate 0.1 m f bypass capacitor to ground may be required right at the pin. v d (pin 5): this pin is used in conjunction with a small external sense inductor to limit power path di/dt. the sense inductor is placed between the v sw output node and the cathode of the freewheeling (power) diode, and the v d pin is connected to the diode. as the voltage across the inductor reaches 2v be , drive to the output transistor is
7 lt1777 block diagra w v c v bg logic feedback amp swdr i 1 v in v d v sw i 2 1777 bd r1 v b v bg r sense i swon osc sync shdn v cc sgnd fb bias i comp i g m dv/dt limiter di/dt limiter q2 q1 4 3 12 7 14 13 5 6 10 output stage si plified sche atic w w + q3 q2 r1 c1 q4 q6 switch on signal q1 q5 r2 v sw v out v in l sense l main r3 note: r3 = r4 r4 1777 ss v d i 1 i
8 lt1777 operatio u the lt1777 is a current mode step-down switcher regu- lator ic designed for low noise operation. the block diagram shows an overall view of the system. the indi- vidual blocks are straightforward and similar to those found in traditional designs, including: internal bias regu- lator, oscillator, logic, and feedback amplifier. the novel portion includes a specialized output switch section in- cluding circuits to limit the di/dt and dv/dt switching rates. the lt1777 operates much the same as traditional current mode switchers, the major difference being its specialized output switch section. due to space constraints, this discussion will not reiterate the basics of current mode switcher/controllers and the buck topology. a good source of information on these topics is application note an19. a straightforward output stage is provided by current source i 1 driving the base of pnp transistor q2. the collector of q2 in turn drives the base of npn output device q1. the considerable base/collector capacitance of pnp q2 acts to limit dv/dt rate during switch turn-on. however, when the switch is to be turned off, the only natural limit to voltage slew rate would be the collector/base capaci- tance of q1 providing drive for the same device. while dependent upon output load level and q1s b , the turn-off voltage slew rate would be typically much faster than the turn-on rate. to limit the voltage slew rate on switch turn- off, an extra function is supplied. this is denoted by the block labeled C dv/dt limiter. the details of the C dv/dt limiter can be seen in the output stage simplified schematic. transistors q3 and q4 are connected in a darlington configuration whose input is coupled with small-valued capacitor c1 to the v in supply rail. the product of negative voltage slew rate times this capacitor value equals current, and when this current through emitter/base resistor r1 exceeds a diode drop, q3 and then q4 turn on supplying base drive to output device q1 to limit C dv/dt rate. in addition to voltage rates, the current slew rate also needs to be controlled for reduced noise behavior. this is provided by the section in the block diagram labeled di/dt limiter. the details of this circuit can be seen in the output stage simplified schematic. note that an extra, small-valued inductor, termed the sense inductor has been added to the classic buck topology. as this inductor is external to the lt1777, its value can be chosen by the user allowing for optimization on a per application basis. operation of the current slew limiter is as follows: the product of the sense inductor times the di/dt through it generates a voltage according to the well known formula v = (l)(di/dt). the remainder of the circuit is configured such that when the voltage across the sense inductor reaches 2v be , drive current will be supplied or removed as necessary to limit current slew rate. the actual sensing is performed between the output node labeled v sw and a new node labeled v d . in the case of switch turn-on, current drive is provided by pnp q2. if the voltage at v sw reaches 2v be above that at v d , transistor q5 turns on and removes a portion of q2s drive from q1s base. similarly for turn-off, as the v sw node goes 2v be below v d , transistor q6 then turns on to drive q1s base as needed. the net effect is that of limiting the switch node di/dt in both directions at a rate inversely proportional to the external sense inductor value.
9 lt1777 applicatio n s i n for m atio n wu u u external sense inductor to set a maximum allowed di/dt rate. this attenuates the highest frequency components of generated b field rfi. minimal lead length in the path is also essential to minimize generated rfi. a second potential source of magnetic rfi is the main (power) inductor. fortunately, the natural triangular be- havior of the current waveform in the main inductor tends to generate magnetic field energy concentrated in the fundamental and lower harmonics. nevertheless, the rela- tively intense magnetic field present in the main inductor can cause coupling problems, especially if the main induc- tor is of an open construction type. so called rod or barrel inductors may be the physically smallest and most effec- tive types, but their magnetic field extends far beyond the device itself. closed type inductors, toroids for example, contain the magnetic field nearly completely. these are generally preferred for low noise behavior. the sense inductor sees a much more rapid current slew rate than does the main inductor. however the sense inductor is physically smaller and of much lower induc- tance than the main inductor. these factors tend to reduce its propensity to generate magnetic interference prob- lems. nevertheless, more sensitive applications can opt for a closed type magnetic construction on the sense inductor. basics of low noise operation switching power supply circuits are often preferred over linear topologies for their improved efficiency (p out / p in ). however, their typically rapid voltage and current slew rates often cause radio frequency interference prob- lems, commonly referred to as rfi. the lt1777 is designed to provide a less aggressive voltage slew rate and a user-programmable current slew rate to eliminate the highest frequency harmonics of rfi emissions. these highest frequency components are typically the most troublesome. optimum behavior is obtained by a combi- nation of proper circuit design, which includes passive component selection, and proper printed circuit board layout technique. there are two types of rfi emissions, i.e., conducted and radiated . conducted interference travels directly through wires, as opposed to radiated interference, which travels through the air. conducted rfi can be created by a switching power supply at its input voltage supply node, its output node(s) or both. it is typically caused by pulsatile current flow through the residual high frequency imped- ance (esr) of bypass capacitors. radiated interference can be of two types: electric (e field) or magnetic (b field). e field interference is caused by stray capacitance coupling of the node(s) which swing rapidly over a large voltage excursion. in the lt1777, this in- cludes the v sw and v d nodes. e field radiation is kept low by minimizing the length and area of all traces connected to these nodes. a ground plane should always be used under the switcher circuitry to prevent interplane cou- pling. although these nodes swing over a voltage range roughly equal to the input voltage, the limited dv/dt rate of the lt1777 reduces the highest frequency components of the generated e field rfi. b field rfi is simply coupling of high frequency magnetic fields generated by the offending circuitry. high frequency magnetic fields are created by relatively rapidly changing currents, and the high speed current switching path in the lt1777 is shown schematically in figure 1. this includes the input capacitor, output switch, sense inductor and output diode. normal switching supply operation requires a rapid switching of current back and forth between the output switch and output diode. the lt1777 uses the + + lt1777 v in c1 d1 v out 1777 f01 c2 l sense l main figure 1. high speed current switching paths selecting sense inductor the lt1777 uses an external sense inductor to set a theoretical limit for current ramp rate according to the formula: max di dt v l be sense / = 2
10 lt1777 applicatio n s i n for m atio n wu u u deciding upon a value for the sense inductor involves evaluating the trade-off between overall efficiency (p out / p in ) and switch current slew rate. larger sense inductors yield lower current slew rates which offer reduced high frequency rfi emissions, but at the expense of poorer efficiency. the question is what is the allowed range of values for a sense inductor in a given application? there is really no minimum limit to the sense inductor, i.e., its value is allowed to be zero. (in other words, the physical sense inductor ceases to exist and is replaced by a short circuit.) this will yield the highest efficiency possible in a given situation. although an explicit current slew rate no longer exists, the naturally less aggressive nature of the lt1777 will often yield quieter supply operation than other stan- dard switching regulators. as far as the maximum allowable value for the sense inductor, this is dictated by the current ramp rate in the main inductor during the conventional part of the switch- ing cycle. it is generally overconservative to limit the switch current slew rate to that exhibited by the main inductor. this would potentially yield a triangular current waveform. efficiency would be greatly reduced at little further gain in noise performance. stated mathematically, maximum slew rate in the main inductor occurs at maxi- mum input voltage as: di dt max v v l in out main = the sense inductor experiences 2v be of applied voltage. this is perhaps 1.0v at a maximum hot condition. if we use an additional factor of two to be conservative, this yields a maximum sense inductor value as follows: 05 05 . , . v l max v v l or max l l v max v v sense in out main sense main in out = = ? ? ? ? as an example, a maximum input voltage of 36v, an output voltage of 5v and a main inductor value of 220 m h yields a maximum suggested sense inductor value of 3.5 m h. circuit behavior versus sense inductor value is shown in the oscilloscope photos in figure 2. the circuit and oper- ating conditions are similar to the typical application on the first page of this data sheet with the exception that the sense inductor is allowed to assume the series of values: 0 m h, 0.47 m h, 1 m h and 2.2 m h. figure 2a shows a close-up of the leading edge (turn-on) of the current waveform. values of 0 m h and 0.47 m h are found to yield a di/dt of about 2.2a/ m s, while 1 m h yields 1.4a/ m s and 2.2 m h yields 0.6a/ m s. figure 2b shows the trailing edge (turn-off) of the figure 2. v sw node current behavior vs l sense value. l sense = 0 m h, 0.47 m h, 1.0 m h and 2.2 m h 100ma/div 200ns/div 1777 f02a (a) leading edge 100ma/div 200ns/div 1777 f02b (b) trailing edge
11 lt1777 applicatio n s i n for m atio n wu u u current waveform. the four sense inductor values of 0 m h, 0.47 m h, 1 m h and 2.2 m h yield di/dt rates of roughly 4.5a/ m s, 2.2a/ m s, 1.4a/ m s and 0.6a/ m s, respectively. these photos show that there is a minimum effective value for sense inductance, which is 0.47 m h for a typical part at room temperature as shown. this value inductor has a small effect on the trailing edge rate, but essentially no effect on the rising edge. minimum effective sense induc- tance value means that inductors much smaller than this value will have substantially the same performance as zero inductance, such that these inductors serve no useful purpose. in summary, 1. the lt1777 uses an external sense inductor to set a theoretical limit for current ramp rate according to the formula: max di dt v l be sense / = 2 2. allowable range for the sense inductor runs from a minimum of 0 to a maximum of: max l l v max v v sense main in out = ? ? ? ? 05 . 3. the minimum effective inductor size is typically 0.47 m h. harmonic behavior the lt1676 is a high efficiency cousin to the lt1777. an additional set of oscilloscope photographs in figure 3 show the leading edge and trailing edge of the current waveform when this part is substituted for the lt1777. (no sense inductor is used with the lt1676.) the leading and trailing edges of the lt1676 current waveform are much faster than that of the lt1777, even when the lt1777 uses a sense inductor of 0 m h. the 10% to 90% rise time/fall time is on the order of 10ns to 20ns, too fast to measure accurately at the horizontal sweep rate of 200ns/div. while this time-based analysis demonstrates that the current waveform of the lt1777 is quieter than standard high efficiency buck converters, some users may prefer to see a direct comparison on a frequency domain basis. figures 4a, 4b, and 4c show a spectral analysis of the current waveforms. the horizontal axis is 2mhz/div (0mhz to 20mhz), and the vertical axis is 10db/div. all photos were taken with v in = 24v and v out = 5v at 400ma. figure 4a is of the lt1676 and is for comparison purposes. figures 4b and 4c are of the lt1777 with a sense inductor of 0 m h and 2.2 m h, respectively. a decrease in high fre- quency energy is seen when going from the lt1676 to the lt1777 with no sense inductor, and a further improve- ment with a 2.2 m h sense inductor. for example, at 10mhz, the lt1777 shows an improvement of about C10db with 0 m h and perhaps C 25db with 2.2 m h. 100ma/div 200ns/div 1777 f03a (a) leading edge figure 3. lt1676 current behavior for comparison purposes only 100ma/div 200ns/div 1777 f03b (b) trailing edge
12 lt1777 applicatio n s i n for m atio n wu u u voltage of 12v, and then 36v. once again the circuit is the typical application shown on the first page of this data sheet, with an output load of 400ma. figure 5a, with v in of 12v, shows a relatively rectangular voltage waveform. the limited voltage slew rate still allows for nearly vertical switching edges, so little power is wasted. a positive-going step before the leading edge and a negative-going step after the trailing edge can be seen. these are evidence of the internal current limiting circuitry at work. figure 5b, with v in of 36v, shows a substantially nonrectangular waveform. the limited voltage slew rate is clearly evident as transitions take a few hundred nanosec- onds. efficiency (p out /p in ) is reduced as a result of the slower transitions. for comparison purposes, the oscillo- scope photo in figure 6 shows the performance of the high efficiency lt1676. voltage transitions are well under 100ns and the waveform appears quite rectangular. 10db/div 0mhz to 20mhz (2mhz/div) 1777 f04a (a) lt1676 for comparison 10db/div 0mhz to 20mhz (2mhz/div) 1777 f04b (b) lt1777 with l sense = 0 m h 10db/div 0mhz to 20mhz (2mhz/div) 1777 f04c (c) lt1777 with l sense = 2.2 m h voltage waveform behavior unlike current behavior, voltage slew rate of the lt1777 is not adjustable by the user. no component selection or other action is required. nevertheless, it is instructive to examine typical behavior. the oscilloscope photos in figure 5 show the v sw voltage waveform with an input 2v/div 1 m s/div 1777 f05a (a) v in = 12v gnd figure 5. v sw node voltage behavior 10v/div 500ns/div 1777 f05b (b) v in = 36v gnd figure 4. spectral analysis of current waveforms in figures 2 and 3. (v in = 24v, v out = 5v, i out = 400ma)
13 lt1777 applicatio n s i n for m atio n wu u u through the main inductor has most of its energy concen- trated in the fundamental and lower harmonics.) toroidal style inductors, many available in surface mount configu- ration, offer a reduced external magnetic field, generally at an increase in cost and physical size. although custom design is always a possibility, most potential lt1777 ap- plications can be handled by the array of standard, off-the- shelf inductor products offered by the major suppliers. selecting bypass capacitors the basic topology as shown in the typical application on the first page uses two bypass capacitors, one for the v in input supply and one for the v out output supply. user selection of an appropriate output capacitor is rela- tively easy, as this capacitor sees only the ac ripple current in the inductor l1. as the lt1777 is designed for buck or step-down applications, output voltage will nearly always be compatible with tantalum type capacitors, which are generally available in ratings up to 35v or so. these tantalum types offer good volumetric efficiency, and many are available with specified esr performance. the product of inductor ac ripple current and output capacitor esr will manifest itself as peak-to-peak voltage ripple on the output node. (note: if this ripple becomes too large, heavier control loop compensation, at least at the switching fre- quency, may be required on the v c pin.) the input bypass capacitor can present a more difficult choice. in a typical application e.g., 24v in to 5v out , relatively heavy v in current is drawn by the power switch for only a small portion of the oscillator period (low on duty cycle). the resulting rms ripple current, for which the capacitor must be rated, can be several times the dc average v in current. the straightforward choice for a low volume, surface mountable electrolytic capacitor with good esr/ripple current ratings is a tantalum type. how- ever, worst-case (high) input voltage coupled with stan- dard capacitor voltage derating may exceed the 35v or so for which tantalum capacitors are generally available. relatively bulky high frequency aluminum electrolytic types, specifically constructed and rated for switching supply applications, may then be the only choice. additionally, it may be advantageous to parallel the input and output capacitors with 0.1 m f ceramic bypass capaci- 10v/div 500ns/div 1777 f06 gnd figure 6. lt1676 v sw node voltage behavior for comparison purposes only, v in = 36v selecting main inductor there are several parameters to consider when selecting a main inductor. these include inductance value, peak current rating (to avoid core saturation), dc resistance, construction type, physical size, and of course, cost. once the inductance value is decided, inductor peak current rating and resistance need to be considered. here, the inductor peak current rating refers to the onset of saturation in the core material, although manufacturers sometimes specify a peak current rating which is de- rived from a worst-case combination of core saturation and self-heating effects. inductor winding resistance alone limits the inductors current carrying capability as the i 2 r power threatens to overheat the inductor. remember to include the condition of output short circuit, if applicable. although the peak current rating of the inductor can be exceeded in short-circuit operation, as core saturation per se is not destructive to the core, excess resistive self- heating is still a potential problem. the final inductor selection is generally based on cost, which usually translates into choosing the smallest physi- cal size part which meets the desired inductance value, resistance and current carrying capability. an additional factor to consider is that of physical construction. briefly stated, open inductors built on a rod- or barrel-shaped core generally offer the smallest physical size and lowest cost. however their open construction does not contain the resulting magnetic field, and they may not be accept- able in rfi-sensitive applications. (a mitigating factor is that, as mentioned previously, the ac current passing
14 lt1777 the solution to this dilemma is to slow down the oscillator when the fb pin voltage is abnormally low thereby indicat- ing some sort of short-circuit condition. figure 7 shows the typical response of oscillator frequency vs fb pin voltage. oscillator frequency is normal until fb voltage drops to about half of its normal value. below this point the oscillator frequency decreases linearly down to a limit of about 25khz. this lower oscillator frequency during short- circuit conditions can then maintain control with the effective minimum on time. a further potential problem with short-circuit operation might occur if the user were operating the part with its oscillator slaved to an external frequency source via the sync pin. however, the lt1777 has circuitry to automati- cally disable the sync function when the oscillator is slowed down due to abnormally low fb voltage. applicatio n s i n for m atio n wu u u tors. their relatively low esr in the mid-mhz region can further attenuate high speed glitches. maximum load/short-circuit considerations the lt1777 is a current mode controller. it uses the v c node voltage as an input to a current comparator, which turns off the output switch on a cycle-by-cycle basis as this peak current is reached. the internal clamp on the v c node, nominally 2.0v, then acts as an output switch peak current limit. this action becomes the switch current limit specification. the maximum available output power is then determined by the switch current limit. a potential controllability problem could occur under short-circuit conditions. if the power supply output is short circuited, the feedback amplifier responds to the low output voltage by raising the control voltage, v c , to its peak current limit value. ideally, the output switch would be turned on, and then turned off as its current exceeded the value indicated by v c . however, there is finite response time involved in both the current comparator and turn-off of the output switch. these result in a minimum on time t on(min) . when combined with the large ratio of v in to (v f + i ? r), the diode forward voltage plus inductor i ? r voltage drop, the potential exists for a loss of control. expressed mathematically the requirement to maintain control is: ft vir v on f in ()( ) + where: f = switching frequency t on = switch on time v f = diode forward voltage v in = input voltage i ? r = inductor i ? r voltage drop if this condition is not observed, the current will not be limited at i pk , but will cycle-by-cycle ratchet up to some higher value. using the nominal lt1777 clock frequency of 100khz, a v in of 48v and a (v f + i ? r) of say, 0.7v, the maximum t on to maintain control would be approximately 140ns, an unacceptably short time. fb divider thevenin voltage (v) 0 0 f osc (khz) 20 40 60 80 100 120 0.25 0.50 0.75 1.00 1777 f07 1.25 r th lt1777 fb r th = 10k r th = 4.7k r th = 22k figure 7. oscillator frequency vs fb divider thevenin voltage and impedance feedback divider considerations an lt1777 application typically includes a resistive divider between v out and ground, the center node of which drives the fb pin to the reference voltage v ref . this establishes a fixed ratio between the two resistors, but a second degree of freedom is offered by the overall impedance level of the resistor pair. the most obvious effect this has is one of efficiencya higher resistance feedback divider will waste less power and offer somewhat higher effi- ciency, especially at light load.
15 lt1777 however, remember that oscillator slowdown to achieve short-circuit protection (discussed above) is dependent on fb pin behavior, and this in turn, is sensitive to fb node external impedance. the graph in figure 7 shows the typical relationship between fb pin voltage, driving im- pedance and oscillator frequency. this shows that as feedback network impedance increases beyond 10k, com- plete oscillator slowdown is not achieved, and short- circuit protection may be compromised. and as a practical matter, the product of fb pin bias current and larger fb network impedances will cause increasing output voltage error. (nominal cancellation for 10k of fb thevenin im- pedance is included internally.) thermal considerations care should be taken to ensure that the worst-case input voltage and load current conditions do not cause exces- sive die temperatures. the so16 package is rated at 50 c/w when the four corner package pins are connected to a good ground plane. (these corner pins are internally fused to the die paddle for improved thermal perfor- mance.) die junction temperature is then a function of ambient temperature and internal dissipation as follows: t j = t a + q ja ? p int total internally dissipated power is composed of three parts, quiescent power, dc switch loss and ac switch loss. the ac switch loss will often dominate the total dissipation, and this is unfortunately difficult to estimate accurately. two options are suggested to the potential user. the first is to observe the graphical data presented in the typical applications section. internal lt1777 dissipation vs load current is given for output voltages of 5v and 3.3v, with input voltages of 12v, 24v and 36v, and with sense inductors of 0 m h, 1 m h, and 2.2 m h (figures 9 and 11). while it is true that the users ultimate circuit may use somewhat different passive components than the ex- amples given, it turns out that internal ic dissipation is not very sensitive to these changes. in cases where the users potential circuit differs signifi- cantly from the examples given, an empirical method is suggested. operate the proposed power supply over the applicable input voltage and load current ranges. measure the input power and output power, and calculate the difference as lost power. this measured lost power minus estimated inductor and diode dissipation yields a figure for internal lt1777 dissipation. fortunately, as lt1777 internal dissipation dominates total lost power, inductor and diode power need not be estimated very accurately. inductor power may be estimated as i 2 r where i is the load current and r is the dc resistance of the inductor. (loss in the sense inductor is usually so small that only the main inductor must be considered.) diode power may be estimated as 1/2 ? v f ? i ? dc, where v f is the diode forward voltage, i is the load current and dc is the duty cycle percentage when the diode is conducting. frequency compensation loop frequency compensation is performed by connect- ing a capacitor, or in most cases a series r/c, from the output of the error amplifier (v c pin) to ground. proper loop compensation may be obtained by empirical meth- ods as described in detail in application note an19. briefly, this involves applying a load transient and observ- ing the dynamic response over the expected range of v in and i load values. as a practical matter, a second small capacitor, directly from the v c pin to ground is generally recommended to attenuate capacitive coupling from the v sw and v d pins. a typical value for this capacitor is 100pf. (see switch node considerations). switch node considerations in spite of the fact that the lt1777 is a low noise converter, it is still possible for the part to cause problems by coupling to itself. specifically, this can occur if the v sw pin is allowed to capacitively couple in an uncontrolled manner to the parts high impedance nodes, i.e., shdn, sync, v c and fb. this can cause erratic operation such as odd/even cycle behavior, pulse width nervousness, im- proper output voltage and/or premature current limit action. applicatio n s i n for m atio n wu u u
16 lt1777 as an example, assume that the capacitance between the v sw node and a high impedance pin node is 0.1pf, and that the high impedance node in question exhibits a capaci- tance of 1pf to ground. also assume a typical 36v in to 5v out application. due to the large voltage excursion at the v sw node, this will couple a 3.5v(!) transient to the high impedance pin, causing abnormal operation. an explicit 100pf capacitor added to the node will reduce the amplitude of the disturbance to more like 35mv (although settling time will increase). applicatio n s i n for m atio n wu u u specific pin recommendations are as follows: shdn: if unused, add a 100pf capacitor to ground. sync: ground if unused. v c : add a capacitor directly to ground in addition to the explicit compensation network. a value of one-tenth of the main compensation capacitor is recommended, up to a maximum of 100pf. fb: assuming the v c pin is handled properly, this pin usually requires no explicit capacitor of its own, but keep this node physically small to minimize stray capacitance.
17 lt1777 typical applicatio n s u basic 5v output application figure 8 shows a basic application that produces 5v at up to 500ma i out . efficiency and internal power dissipation graphs are shown in figure 9 for input voltages of 12v, 24v and 36v, and for sense inductor values of 0 m h, 1 m h and 2.2 m h. be aware that continuous operation at the combination of high input voltage, large sense inductor and high output current may not be possible due to thermal constraints. (brief transients in input voltage or output current should not present a problem, though.) as shown, the shdn and sync pins are unused, however either (or both) can be optionally driven by external signals as desired. the data as shown were performed using an off-the-shelf coilcraft do3316-224 as the main inductor. this is a cost-effective inductor using an open style of construc- tion. for a toroidal style inductor, the coiltronics ctx250-4 or similar may be substituted. + v in v cc v sw lt1777 v d shdn sync 4 10 7 6 d1 l1 0 h to 2.2 h (see below) l2 220 h c2 100 f 10v r1 36.5k 1% 1777 f08 v out 5v r2 12.1k 1% 5 3 v in 10v to 40v 12 14 13 v c fb sgnd + c1 39 f 63v r3 12k c3 2200pf c4 100pf c1: panasonic hfq electrolytic c2: avx d case tpsd107m010r0080 c3, c4, c5: npo or x7r c6, c7: z5u d1: motorola 100v, 1a smd schottky mbrs1100 l1: sense inductor can vary from 0 h to 2.2 h as per application. graphical data taken with: 1 h = d01608c-102, coilcraft or similar 2.2 h = d01608c-222, coilcraft or similar (see text) l2: coilcraft d03316-224 or similar (see text) c5 100pf c6 0.1 f c7 0.1 f figure 8. basic 5v output application
18 lt1777 typical applicatio n s u figure 9. efficiency and lt1777 internal dissipation for the basic 5v output application internal dissipation i out (ma) 0 0.6 0.4 0.2 1.4 1.2 1.0 0.8 1777 f09b internal dissipation (w) 10 1000 100 1 h 0 h l sense = 2.2 h v in = 12v v out = 5v t a = 25 c i out (ma) 0 0.6 0.4 0.2 1.4 1.2 1.0 0.8 1777 f09d internal dissipation (w) 10 1000 100 1 h 0 h l sense = 2.2 h v in = 24v v out = 5v t a = 25 c i out (ma) 0 0.6 0.4 0.2 1.4 1.2 1.0 0.8 1777 f09f internal dissipation (w) 10 1000 100 1 h 0 h l sense = 2.2 h v in = 36v v out = 5v t a = 25 c v in = 12v v in = 24v v in = 36v efficiency i load (ma) 1 90 efficiency (%) 20 30 40 10 100 1000 1777 f09a 80 70 60 50 v in = 12v v out = 5v t a = 25 c l sense = 0 h 1 h 2.2 h i load (ma) 1 90 efficiency (%) 20 30 40 10 100 1000 1777 f09c 80 70 60 50 v in = 24v v out = 5v t a = 25 c l sense = 0 h 1 h 2.2 h i load (ma) 1 90 efficiency (%) 20 30 40 10 100 1000 1777 f09e 80 70 60 50 v in = 36v v out = 5v t a = 25 c l sense = 0 h 1 h 2.2 h
19 lt1777 typical applicatio n s u basic 3.3v output application figure 10 shows a circuit similar to the previous example, but modified for a 3.3v output. once again, efficiency and internal power dissipation graphs are shown in figure 11 for input voltages of 12v, 24v and 36v, and for sense inductor values of 0 m h, 1 m h and 2.2 m h. it is interesting to note that internal lt1777 dissipation is very close to the 5v example. this confirms the fact that internal lt1777 dissipation is largely determined by input voltage, load current and sense inductor, and is only a weak function of output voltage. the data as shown were performed using an off-the-shelf coilcraft do3316-154 as the main inductor. this is a cost- effective inductor using an open style of construction. for a toroidal style inductor, the coiltronics ctx150-4 or similar may be substituted. + v in v cc v sw lt1777 v d shdn sync 4 10 7 6 d1 l1 0 h to 2.2 h (see below) l2 150 h c2 100 f 10v r1 20k 1% 1777 f10 v out 3.3v r2 12.1k 1% 5 3 v in 10v to 40v 12 14 13 v c fb sgnd + c1 39 f 63v r3 12k c3 2200pf c4 100pf c1: panasonic hfq electrolytic c2: avx d case tpsd107m010r0080 c3, c4, c5: npo or x7r c6, c7: z5u d1: motorola 100v, 1a smd schottky mbrs1100 l1: sense inductor can vary from 0 h to 2.2 h as per application. graphical data taken with: 1 h = d01608c-102, coilcraft or similar 2.2 h = d01608c-222, coilcraft or similar (see text) l2: coilcraft d03316-154 or similar (see text) c5 100pf c6 0.1 f c7 0.1 f figure 10. basic 3.3v output application
20 lt1777 typical applicatio n s u internal dissipation figure 11. efficiency and lt1777 internal dissipation for the basic 3.3v output application i out (ma) 0 0.6 0.4 0.2 1.4 1.2 1.0 0.8 1777 f11b internal dissipation (w) 10 1000 100 1 h 0 h l sense = 2.2 h v in = 12v v out = 3.3v t a = 25 c i out (ma) 0 0.6 0.4 0.2 1.4 1.2 1.0 0.8 1777 f11d internal dissipation (w) 10 1000 100 1 h 0 h l sense = 2.2 h v in = 24v v out = 3.3v t a = 25 c i out (ma) 0 0.6 0.4 0.2 1.4 1.2 1.0 0.8 1777 f11f internal dissipation (w) 10 1000 100 1 h 0 h l sense = 2.2 h v in = 36v v out = 3.3v t a = 25 c v in = 12v v in = 24v v in = 36v efficiency i load (ma) 1 90 efficiency (%) 20 30 40 10 100 1000 1777 f11a 80 70 60 50 v in = 12v v out = 3.3v t a = 25 c l sense = 0 h 1 h 2.2 h i load (ma) 1 90 efficiency (%) 20 30 40 10 100 1000 1777 f11c 80 70 60 50 v in = 24v v out = 3.3v t a = 25 c l sense = 0 h 1 h 2.2 h i load (ma) 1 90 efficiency (%) 20 30 40 10 100 1000 1777 f11e 80 70 60 50 v in = 36v v out = 3.3v t a = 25 c l sense = 0 h 1 h 2.2 h
21 lt1777 optional input/output filtering when minimum conducted noise is required, it is often advantageous to add an explicit input and/or output filter to the topology. this can be a cost-effective way to reduce conducted noise on the input or output node by an order of magnitude or more. the exact details involved are a bit lengthy, so the user is referred to the thorough treatments in application notes an19 and an44. however, an ex- ample will be given to illustrate the principles involved. figure 12 shows the previous basic 5v output applica- tion modified with an additional input inductor and an output l/c combination. the dramatic improvement in noise performance is seen in the accompanying oscillo- scope photos shown in figures 13 and 14. operating conditions are v in = 24v, i out = 400ma. the pair of scope photos in figure 13 show the response at the input node, before and after the additional 33 m h inductor is added. the upper waveform shows an ac-coupled version of the output voltage at 50mv/div, and the lower waveform is a dc-coupled representation of current into the node at 50ma/div. input voltage ripple is seen to decrease from 100mv p-p to perhaps 10mv p-p . ripple current is also seen to decrease dramatically. (this improvement in ac ripple current actually affects radiated magnetic noise.) the next pair of scope photos in figure 14 show an ac-coupled version of the output node at 2mv/div. voltage ripple is seen to be originally about 12mv p-p , with most of the energy in the lowest harmonics. after the addition of a 4.7 m h inductor and a second 100 m f output capacitor, ripple is about 200 m v p-p . these input and output inductor requirements are typically not very difficult to achieve, and inexpensive open style do1608c types were used in this example. once again, more costly closed-construction style inductors may be employed, but these are usually not necessary, as the ac fields generated by these inductors are typically small. typical applicatio n s u figure 13. input node ripple + v in v cc v sw lt1777 v d shdn sync 4 10 7 6 d1 l4 4.7 h l3 33 h 1777 f12 v out 5 3 v in 12 14 13 v c fb sgnd + c8 100 f 10v + additional filter components l3: coilcraft d01608c-333 or similar l4: coilcraft d01608c-472 or similar c8: avx d case tpsd107m010r0080 figure 12. basic 5v application with optional input/output filters 2 m s/div v in node voltage ac coupled 50mv/div 1777 f13b (b) after input inductor gnd, ch2 v in node current dc coupled 50ma/div 2 m s/div v in node voltage ac coupled 50mv/div v in node current dc coupled 50ma/div gnd, ch2 1777 f13a (a) before input inductor
22 lt1777 typical applicatio n s u figure 14. output node ripple 2 m s/div (b) after output filter 2 m s/div 1777 f13a (a) before output filter v out node ac coupled 2mv/div 1777 f14b user programmable undervoltage lockout figure 15 uses a resistor divider between v in and ground to drive the shdn node. this is a simple, cost-effective way to add a user-programmable undervoltage lockout (uvlo) function. resistor r5 is chosen to have approxi- mately 200 m a through it at the nominal shdn pin lockout threshold of roughly 1.25v. the somewhat arbitrary value of 200 m a was chosen to be significantly above the shdn pin input current to minimize its error contribution, but significantly below the typical 2.5ma the lt1777 draws in lockout mode. resistor r4 is then chosen to yield this same 200 m a, less 2.5 m a, with the desired v in uvlo volt- age minus 1.25v across it. (the 2.5ma factor is an allow- ance to minimize error due to shdn pin input current.) behavior is as follows: normal operation is observed at the nominal input voltage of 24v. as the input voltage is decreased to roughly 18v, switching action will stop, v out will drop to zero, and the lt1777 will draw its v in and v cc quiescent currents from the v in supply. at a lower input voltage, typically 10v or so at 25 c, the voltage on the shdn pin will drop to the shutdown threshold, and the part will draw its shutdown current only from the v in rail. the resistive divider of r4 and r5 will continue to draw power from v in . (the user should be aware that while the shdn pin lockout threshold is relatively accurate including temperature effects, the shdn pin shutdown threshold is more coarse, and exhibits considerably more temperature drift. nevertheless the shutdown threshold will always be well below the lockout threshold.) figure 15. user programmable uvlo r4 84.5k 1% r5 6.19k 1% c5 100pf shdn lt1777 1777 f15 v in v out node ac coupled 2mv/div
23 lt1777 package descriptio n u dimensions in inches (millimeters) unless otherwise noted. s package 16-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 1 2 3 4 5 6 7 8 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 s16 1098 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
24 lt1777 ? linear technology corporation 1999 1777f lt/tp 0899 4k ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com circuit is capable of delivering up to 300ma at 5v, from input voltages as high as 28v. the only disadvantage is that due to the increased resistance in the inductor, the circuit is no longer capable of withstanding indefinite short circuits to ground. the lt1777 will still current limit at its nominal i lim value, but this will overheat the inductor. momentary short circuits of a few seconds or less can still be tolerated. typical applicatio n u minimum pc board size application the previously described basic applications employ power path parts which are capable of delivering the full rated input supply voltage and output current capabilities of the lt1777. a substantial improvement in printed circuit board area requirements can be achieved with the circuit shown below. this uses a physically smaller and less costly power inductor and a tantalum input capacitor. this part number description comments lt1076 100khz, 2a step-down switching regulator integrated 2a switch, v in up to 46v lt1533 ultralow noise 1a switching regulator push-pull design for low noise isolated supplies lt1534 ultralow noise 2a switching regulator ultralow noise regulator for boost topologies lt1576 200khz, 1.5a step-down switching regulator output up to 1.25a, integrated switch, so-8 package ltc1622 low v in step-down dc/dc controller fixed frequency 550khz operation, msop package ltc1624 high efficiency so-8 dc/dc controller 200khz operation, v in from 3.5v to 36v, so-8 package lt1676/lt1776 wide input range, high efficiency, step-down voltage regulator 7.4v to 60v input, 100/200khz operation, 700ma inter nal switch related parts + v in v cc v sw lt1777 v d shdn sync 4 10 7 6 d1 l1 0 h to 2.2 h (see below) l2 200 h c2 100 f 10v r1 36.5k 1% 1777 ta03 v out 5v r2 12.1k 1% 5 3 v in 10v to 28v 12 14 13 v c fb sgnd + c1 22 f 35v r3 12k c3 2200pf c4 100pf c1: avx e case tpse226m035r0300 c2: avx d case tpsd107m010r0080 c3, c4, c5: npo or x7r c6, c7: z5u d1: motorola 100v, 1a smd schottky mbrs1100 l1: sense inductor can vary from 0 h to 2.2 h as per application. see previous schematics for examples l2: coilcraft ctx200-1 or similar c5 100pf c6 0.1 f c7 0.1 f minimum pc board area application

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